US05490170 | Coding apparatus for digital signal | |
Assignee | Sony Corporation | |
Assign./Filed | Feb. 6, 1996/ Nov. 30, 1993 | |
Inventors | Akagiri; Kenzo, Tsutsui; Kyoya | |
Summary | Block floating enhancement. Similarity to other ATRAC patents. | |
Abstract | In a coding apparatus for a digital signal adapted for implementing, every variable length block, floating processing to an input digital signal by using a block floating processing circuit thereafter to orthogonally transform signal components which have undergone such processing by using orthogonal transform circuits (e.g., DCT circuits), the block floating processing circuit is constructed so as to determine the length of a variable length block and a floating coefficient of the block floating processing on the basis of the same index, e.g., a maximum absolute value in that block. Thus, a quantity subject to processing can be reduced. In addition, there may be employed such a configuration to divide, every critical bands, spectrum signals on the frequency base from DCT (Discrete Cosine Transform) circuits to determine, every respective critical bands, allowed noises in which the masking is taken into consideration to compare these allowed noises and a minimum audible curve from a minimum audible curve generator at a comparator. When the minimum audible curve is grater than an allowed noise at that time, this minimum audible curve is considered as an allowed noise to divide the critical band into smaller bands to carry out bit allocation every respective smaller bands, and to rase or set a flag. Thus, an accurate allowed noise level can be provided without increasing auxiliary information. |