US05454011 | Apparatus and method for orthogonally transforming a digital information signal with scale down to prevent processing overflow | |
Assignee | Sony Corporation | |
Assign./Filed | Sept. 26, 1995/ Nov. 23, 1993 | |
Inventors | Shimoyoshi; Osamu | |
Summary | ATRAC enhancement. Strong similarity to US05381143. | |
Abstract | An apparatus for orthogonally transforming a digital information signal representing a physical quantity in a first domain to provide an orthogonally-transformed signal representing the physical quantity in a second domain, orthogonal to the first domain. In the apparatus, an orthogonal transform circuit orthogonally transforms the digital information signal in blocks, and includes plural, serially-arranged, processing stages, each of which receives a signal block from an immediately preceding processing stage for processing. The first plural processing stage receives each block of the digital information signal as a signal block. A circuit determines a scale down amount for the signal block received by one of the plural processing stages, and a circuit scales down the signal block received by the one of the plural processing stages by the scale down amount. A method for orthogonally transforming a digital information signal to provide an orthogonally-transformed signal in which an orthogonal transform circuit is provided that includes plural, serially-arranged, processing stages, each of which receives a signal block from an immediately preceding processing stage for processing. The first plural processing stage receives a block of the digital information signal as a signal block for processing. A scale down amount is determined for the signal block received by one of the plural processing stages. Then, the signal block received by the one of the plural processing stages is scaled down by the scale down amount. |